Project 2: BJT Amplifier


Design of a 4 GHz Microwave Amplifier


Grade Weight: 25% of Total Grade

Project Handout:
PROJECT 2 - Design of a 4 GHz Microwave Amplifier (98.0 kB)

Amplifier Report Submissions:

Click on the folder below to submit your filter report (it will open the submission form):
Amplifier Report Submissions
Due Date: Friday Dec 6, 2019 11:59 PM.
Submission link available until Saturday Dec 7, 2019 11:55 PM.

Important:  Submit only as a PDF, any other format will not be accepted.

i) Please use the following file submission nomenclature:

               AMRP_Initials (first name, last name) _ Student number _ vX

As an example, if this was your name, student number, and submission version:
  • Student Name: Shakeeb Abdullah
  • Student Number: 100988283
  • Version Submission: v0
Then you would name your submission file as:

              AMPR_SA_100988283_v0.pdf

ii) Your first submission will be v0.  Every time you re-upload your report, increase the version number by 1.  Ex. next iteration of project upload would be:

              AMPR_SA_100988283_v1.pdf

You can keep re-uploading your report until the submission link above is deactivated; at which point the report will be no longer accepted.  The latest version that was uploaded will be used for marking.


Updates:

November 21st, 2019:

A)

When you submit your 7zads project file, only include one layout of your design, the one that you want for tape-out of fabrication.    That way I don't have to guess as to which layout you want me to use.  Submit your theoretical and microstrip design schematic with your project submission in your 7zads project file as well.

Also take a snippet of your amp response for your theoretical and actual microstrip response in one image file and upload it using the same project submission link below.

Use the file nomenclature:

FirstName_LastName_StudentNumber_Amp_Response.jpg (or .png)

Example

Shakeeb_Abdullah_100748293_Amp_Response.jpg

Summary of files to submit:

1 .Amplifier project 7zads (just like the filter submission):
        i) Include one (and only one) layout of your final amp.
        ii) Schematic of your theoretical matching
        iii) Practical microstrip schematic that corresponds to submitted layout

2. One PNG or JPEG File of your theoretical and practical response in one image file:

     i) Zoom into a frequency span ~1GHz
     ii) Put marker on centre frequency s11 and s21

B)

Don't forget to leave ~200 mils on each end of the input and output (just like your filter) for your connectors.

C)
 
Once you have submitted your amplifier fill out this form for your bias voltage and current:


Bias Form Link

Power Amplifier Project Layout Submission:

Click on the folder below to submit your project (it will open the submission form):

PA Layout Submissions
PA submission link will disable: Prospective Date of November Monday 18, 11:59 PM.  Otherwise Pending Future Date if extended.

i) Please use the following file submission nomenclature:

               PAL_Initials (first name, last name) _ Student number _ vX

As an example, if this was your name, student number, and submission version:
  • Student Name: Shakeeb Abdullah
  • Student Number: 100988283
  • Version Submission: v0
Then you would name your submission file as:

              PAL_SA_100988283_v0

ii) Your first submission will be v0.  Every time you re-upload your project, increase the version number by 1.  Ex. next iteration of project upload would be:

              PAL_SA_100988283_v1

You can keep re-uploading your project (whether you have an updated design or you fixed an error) until the submission link above is deactivated; at which point the projects will be no longer accepted.  The latest version that was uploaded will be used for your amplifier tape-out.

iii) Submit your project as a 7zads archive (ex. PAL_SA_100988283_v0.7zads).
  • From the ADS Main Menu Window, select File >> Archive Workspace
  • Uncheck any Data Displays (Same as your filter project):


  • Uncheck Include EM data files for visualization


Announcements:

i) Please use the provided BFP450 ADS Model (7zads) below.  Import the model into ADS and then run s-parameter simulations to get the s-parameters required for your amplifier design.  Do not use the s-parameter file that was given.  You can pick and drop the symbol of the transistor model into a new schematic.
ii) Choose a proper biasing point from the datasheet of the transistor given below, and use those parameters for your DC bias.  In your schematic use an ideal current source for your base current (ib) and an ideal voltage source for your collector voltage (VCC).

iii) For your ideal simulations, use the VIAGND element for your VIAS with:

                                              D = 20 mil
                                              T = 0.7 mil
                                              Rho = 1.0
                                              W = 25 mil
You will require the MSUB block to simulate with the VIAGND elements.

Since it is an ideal simulation, you can use either single vias on each emitter of the Transistor or double vias, however using double vias will be closer to your physical design.  You will be optimizing/tuning your microstrip design to this ideal simulation.

Make sure to use double VIAs for your physical microstrip implementation of your board with 30mil x 30mil MLIN in between the VIAs:


iv) For your final layout for tape-out (after simulation is confirmed and your amplifier is working), replace all of the vias in the layout with VIA2 pads, use these settings for the VIA2 pads (or use the VIA2 footprint provided in note ix) below):


It is important that Cond1Layer is cond:drawing, HoleLayer is hole:drawing, and Cond2Layer is cond2:drawing.

v) For now use FR4 62 mil substrate with:

     H = 62 mil
     Er = 4.6
     T = 0.7 mil
     Cond = 5.8E7
     TanD = 0.02
     Rough = 55 micro-inch

However be ready to change the settings of the material if the material is changed before tape-out.

vi) Use DC Blocks to isolate the biasing signals from the ac input and output.  Use DC Feed to isolate the ac signal from the biasing dc signal.

vii) Use open ended shunt stub matching for your input and output matching network.

viii) Check stability from 10 MHz to 7 GHz, zoom in near the cut-off criteria in your final design.

ix) Use the BFP450 footprint and VIA2 layout that is provided below in the 'Required Resources' for your layout.  The file is called 'BFP450-Footprint.gds' and includes both the transistor and via footprints.  To import it into ADS as a gds file:

Download the .gds file into an upper directory without any spaces in the path name/folder or directory name.  IMPORTANT!!! : There cannot be any space character in the directory pathway where you decide to store the file otherwise the import will fail with an error in ADS!

Open your amplifier project in ADS and select import from the main ADS window:  File >> Import >> Design


Select File type as GDSII Stream Format.  Make sure the import file exists in a pathway without any spaces!  Select Options.


In the 'More Options' window, select 'Layer map file' as:  Automap (map GDSII datatype 0 to drawing).  Make sure cond, cond2, and hole exists in the menu.


Once the gds file is imported successfully, two folders containing layout will be generated in your amplifier project directory hierarchy:


Use the footprint layout for your BFP450 transistor in your amplifier layout design.  Use the VIA2 layout for all vias in your amplifier layout design once you have completed your final layout -- delete the original VIAGNDs and replace them with the VIA2s.  See note iv) above regarding the VIA2s.

x)  Go ahead and use double vias in places where there is a single via to gnd in your schematic and layout.  In the layout make sure to extend the upper layer conductor (cond) all the way to the edges of the vias:


xi) For your initials on your amplifier layout (to identify your amp), please strictly use these settings and fonts:
  • Font Height: 200 mils
  • Font Type: Straight
  • Layer: cond
Please use the font through the "Block Text Fonts" drop-down menu and not through the text shape icon:


Place the initials away from the stubs and rf line, use judgement as to where to place your initial (preferably near the bottom of the board).

xii) For chevrons use:

  • 100 mils x 100 mils square
And use it in this configuration for them:


    xiii) Absolutely make sure that you zoom in all the way and that the parts that should be connected are connected together without any space in between them.

    xiv) For final amp version for tape-out, please only use two decimal places max for the lengths and widths of your microstrip components.

    xv) Remember guys, minimum line width and spacing is 10 mil, do not make it any smaller!

    xvi) Both DC networks for the base and collector of the transistor is the same.  Use 22 μH inductor as your DC Feed.  An s2p file for the 50 Ohm has not been provided, use an ideal 50 Ohm resistor in your schematic.  Use the 0.1 μF capacitor in series with the 50 Ohm resistor.  Use the s2p files provided in place of the capacitors and inductors in your circuit.  Remember to place a DC Block elements in series with all your capacitors.  You do not need a DC Feed element in series with your s2p file of your inductor.   For the DC biasing network see image below (click on image below for clarity):

    Use 300 mil x 300 mil pad at the top of your DC network.   Extend the pad all the way to the edge of your board (the length of the pad can be greater than 300 mils).   

    xvii) Use the datasheets of the components provided to make the component spacings in your layout.  Use at-least 65 mil x 65 mil pads between the DC components for soldering (click on image below for clarity):

    Remember to space the components accordingly, not to close or not too far.  Leave enough copper trace underneath the components for soldering (click on image below for clarity):

    Hints:

    i) For those of you that are designing at the lower frequencies, you will probably need to design gain circles, for those of you that are designing at the higher frequencies, you will probably design for max gain.

    ii) Review Lecture 10 if need be and follow the examples given in Lecture 11:

    Lecture 11a (334 kB)
    Lecture 11b (108 kB)
    Lecture 11c (1.1 MB)
    Lecture 11d (785 kB)

    iii) Do stability analysis before jumping into the design.  Use the stability metric(s) first before jumping into doing stability circles.  You may not require stability circles.

    iv) Check the unilateral assumption U before jumping into gain design.

    v) Use the Smith Chart provided below to do your matching analysis.  You will need a math compass.

    vi) For your physical microstrip amplifier, try to optimize the design to your theoretical amplifier, and then manually tune it.  If your optimization does not help at all, try other optimization techniques.

    Design Tutorials:

    Design for MaxGain: Demo.pdf (303 kB)
    Design for Specific Gain: Demo.pdf (432 kB)   

    Required Resources:

    *** Note: If you are having issues downloading the files below, use a private window from your browser.  Ignore the download error warning and just download the file. 

    *** Note: The resonant capacitors for your DC bias and the DC Block capacitors are the same.

    BFP450 Manual: Infineon Datasheet - PDF Format (522 kB)
    BFP450 ADS Model: Transistor model with parasitic - 7zads File (63 kB)
    BFP450 and VIA2 Footprint: BFP450-Footprint.gds GDS File (2.0 kB)
    DC Block Capacitor 3.3 pF Datasheet: C0805C339D5GACTU.pdf (1.29 MB)
    DC Block Capacitor 3.3 pF s2p File: C0805C339D5GACTU.s2p (zip - 12.0 kB)
    DC Feed Inductor 22 μH Datasheet: MLZ2012N220LT000.pdf (309.6 kB)
    DC Feed Inductor 22 μH s2p File: MLZ2012N220LT000.s2p (zip - 16.8 kB)
    DC Resonant Capacitor 3.3 pF Datasheet: C0805C339D5GACTU.pdf (1.29 MB)
    DC Resonant Capacitor 3.3 pF s2p File: C0805C339D5GACTU.s2p (zip 12.0 kB) Stability Resistor 50 Ohm Datasheet: ERJ-6ENF49R9V.pdf (387.4 kB)
    Stability Capacitor 0.1 μF Datasheet: C0805C104K5RAC.pdf (1.4 MB)
    Stability Capacitor 0.1 μF s2p File: C0805C104K5RAC.s2p (7.7 kB)
    Smith Chart: PDF Format (63.6 kB)

    Report Requirements:

    1) Preliminaries and Standards:
    • Report is 20 pages max from Introduction to Conclusion.  Use your space wisely and accordingly.  Don't use 18 pages just for theory and then 2 pages for everything else.
    • Make sure to include a Title Page stating:
      • Project Name
      • Student Name
      • Student Number
      • Submission Date
    • The 20 page limit does not include the pre and post matter such as the Title Page, Abstract, Tables and Lists, and References.
    • Number all pages appropriately.
    2) Do the matching networks and gain circles by hand using a smith chart.  Attach it at the Appendix of your report.  For those of you that are doing gain circle, you will need to attach one smith chart for the gain circle, one for the input matching, and one for the output matching.  For those of you that are designing for max gain, you will only need to attach a smith chart example for the input matching and the output matching.

    3) Show all 4 matching combinations in your report and explain your thought process and why as to which combination you chose for your design.

    4) Show 3 manual stability analysis and sample calculations: one for the centre frequency and two for the band edge frequencies.  Show sample calculations for all stability parameters K, Δ, B1-factor, and μ. 

    5) Include stability graph over 10 MHz - 7 GHz.

    6) This is a design report, include all design elements in the report including the steps and methodologies used to design the amplifier. 

    Example Measurement Test Set-Up:

    DC Bias Circuit and Measurement Test Setup Example: PDF Format (591 kB)
    Software for Measuring Voltage and Current (.NET Framework Required): EXE Format (283 kB)

    Additional Resources:

    FR4 Datasheet from Farnell: PDF Format (48.4 kB)
    FR4 Datasheet from WEdirekt: PDF Format (61.1 kB)
    FR4 Datasheet from Turkish Electric Power: PDF Format (427 kB)
    FR4 Datasheet from Amazon S3: PDF Format (3.3 MB)
    FR4 Datasheet from CERN Indico: PDF Format (454 kB)
    FR4 Datasheet from Cylex: PDF Format (107 kB)